Regviz

Freescale Semiconductor /MK21D5WS /RTC /TIR

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as TIR

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/Freescale Semiconductor/MK61F15WS/RTC/TIR#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (0)DTIE 0 (0)VTIE 0 (0)CTIE 0 (0)TTIE 0 (0)FSIE 0 (0)TMIE 0RESERVED

FSIE=0, TTIE=0, CTIE=0, TMIE=0, VTIE=0, DTIE=0

Description

RTC Tamper Interrupt Register

Fields

DTIE

DryIce Tamper Interrupt Enable

0 (0): Interupt disabled.

1 (1): An interrupt is generated when DryIce tamper flag is set.
VTIE

Voltage Tamper Interrupt Enable

0 (0): Interupt disabled.

1 (1): An interrupt is generated when the voltage tamper flag is set.
CTIE

Clock Tamper Interrupt Enable

0 (0): Interupt disabled.

1 (1): An interrupt is generated when the clock tamper flag is set.
TTIE

Temperature Tamper Interrupt Enable

0 (0): Interupt disabled.

1 (1): An interrupt is generated when the temperature tamper flag is set.
FSIE

Flash Security Interrupt Enable

0 (0): Interupt disabled.

1 (1): An interrupt is generated when the flash security flag is set.
TMIE

Test Mode Interrupt Enable

0 (0): Interupt disabled.

1 (1): An interrupt is generated when the test mode flag is set.
RESERVED

no description available

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data